MSS=0, MFF=0, CTSE=0, CKPOL=0, CKPH=0, SSE=0
SPI Mode Register
| SSE | SSn# Pin Function Enable 0 (0): SSn# pin function is disabled. 1 (1): SSn# pin function is enabled. |
| CTSE | CTS Enable 0 (0): CTS function is disabled (RTS output function is enabled). 1 (1): CTS function is enabled. |
| MSS | Master Slave Select 0 (0): Transmission is through the TXDn pin and reception is through the RXDn pin (master mode). 1 (1): Reception is through the TXDn pin and transmission is through the RXDn pin (slave mode). |
| Reserved | This bit is read as 0. The write value should be 0. |
| MFF | Mode Fault Flag 0 (0): No mode fault error 1 (1): Mode fault error |
| Reserved | This bit is read as 0. The write value should be 0. |
| CKPOL | Clock Polarity Select 0 (0): Clock polarity is not inverted. 1 (1): Clock polarity is inverted |
| CKPH | Clock Phase Select 0 (0): Clock is not delayed. 1 (1): Clock is delayed. |